| TYPE | DESCRIPTION |
| Mfr | AMD Xilinx |
| Series | Versal® AI Core |
| Package | Box |
| Part Status | Active |
| Type | FPGA + MCU/MPU SoC |
| For Use With/Related Products | XCVC1902 |
| Platform | Versal ACAP VCK5000 Dev Card ED |
| Contents | Board(s) |
| Interconnect System | - |
| Suggested Programming Environment | Vitis |
| Note | P/N Breakdown: ED = Encryption Disabled |
